Compare commits
1 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
| 083242d4f1 |
@ -27,15 +27,11 @@ So far, stcgal was tested with the following MCU models:
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* STC89C52RC (BSL version: 4.3C)
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* STC12C2052AD (BSL version: 5.8D)
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* STC12C5A60S2 (BSL version: 6.2I)
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* STC11F02E (BSL version: 6.5K)
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* STC11F08XE (BSL version: 6.5M)
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* STC15F104E (BSL version: 6.7Q)
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* STC15F204EA (BSL version: 6.7R)
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* STC15L104W (BSL version: 7.1Q)
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* IAP15F2K61S2 (BSL version: 7.1S)
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* STC15L2K16S2 (BSL version: 7.2.4S)
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* STC15W408AS (BSL version: 7.2.4T)
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* STC15W4K56S4 (BSL version: 7.3.4T)
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More compatibility testing is going to happen soon.
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@ -233,7 +229,6 @@ Option key | Possible values | Protocols/Models | Descri
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```rstout_por_state``` | low/high | STC15+ | RSTOUT pin state after power-on reset
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```uart2_passthrough``` | true/false | STC15+ | Pass-through UART1 to UART2 pins (for single-wire UART mode)
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```uart2_pin_mode``` | push-pull/normal | STC15+ | Output mode of UART2 TX pin
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```cpu_core_voltage``` | low/mid/high | STC15W+ | CPU core voltage (low: ~2.7V, mid: ~3.3V, high: ~3.6V)
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### Frequency trimming
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@ -5,7 +5,6 @@ MCS3 is like early STC15 MCS1.
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MCS2 is like early STC15 MCS2.
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MCS4 is like early STC15 MCS0 but with additions.
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MCSX is like early STC15 MCS12.
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MCSY is new in STC15W4 series
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baseline
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B5 FF F7 BB 9F
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@ -81,37 +80,3 @@ external oscillator enabled (IAP15F2K61S2)
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external oscillator enabled + clock gain low (IAP15F2K61S2)
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9C 7F F7 BB 9C
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--> MCS 4 bit controls clock gain. high => high clock gain, low => low clock gain.
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cpu core supply level (MCSY)
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in status packet:
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2.68v
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46 B9 68 00 34 50 8D FF 73 96 F7 BC 9F 00 5B 7A C0 FD 27 ED 00 00 73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00 EC E0 04 D7 EA 92 FF FF FF 15 09 25 60 14 BD 16
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3.33v
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46 B9 68 00 34 50 8D FF 73 96 F7 BC 9F 00 5B 92 30 FD 25 EA 00 FC 73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00 EC E0 04 D7 F7 92 FF FF FF 15 09 25 60 15 49 16
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3.63v
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46 B9 68 00 34 50 8D FF 73 96 F7 BC 9F 00 5B 7A C0 FD 25 EF 00 00 73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00 EC E0 04 D7 FD 92 FF FF FF 15 09 25 60 14 D0 16
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3.73v
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46 B9 68 00 34 50 8D FF 73 96 F7 BC 9F 00 5B 92 30 FD 25 EA 00 00 73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00 EC E0 04 D7 FF 92 FF FF FF 15 09 25 60 14 55 16
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^^
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MCSY
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voltage: ff -> 3.73v
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fd -> 3.63v
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f7 -> 3.33v
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ea -> 2.68v
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in set options packet:
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46 B9 6A 00 4B 04 00 00 5A A5 FF FF FF 00 FF FF
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00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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00 00 FF A8 FF EE FF E0 FF FD 03 FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FD FF FF FF 75 BF F7 BC 9F 3A 80 16
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^^
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MCSY
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@ -58,11 +58,6 @@ info packet
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MCS2-4 MCSX
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^^
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factory calibration adjust for 24 MHz (range 0x40)?
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STC15W4K56S4:
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46 B9 68 00 34 50 8D FF 73 96 F7 BC 9F 00 5B 7A C0 FD 27 ED 00 00 73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00 EC E0 04 D7 EA 92 FF FF FF 15 09 25 60 14 BD 16
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^^
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core voltage (MCSY)
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IAP15F2K61S2:
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external osc:
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@ -145,9 +140,8 @@ option packet
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FF FD FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF B5 FF F7 BB 9F 3A 48 16
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^ ^^^^^^^^^^^^^^
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MCSX ^^ MCS0-4
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MCSY
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(STC15W4)
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MCSX MCS0-4
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MCS bytes
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---------
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@ -160,7 +154,7 @@ RC calibration adjust
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0x3f + RC calibration range (0x00, 0x40, 0x80, 0xc0)
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### MCS2 - MCS4, MCSX and MCSY
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### MCS2 - MCS4 and MCSX
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See stc15-options.txt
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@ -1,128 +0,0 @@
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2015-12-10 23:47:44.198341: PC
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F 7F
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2015-12-10 23:47:48.400692: MCU
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46 B9 68
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2015-12-10 23:47:48.411946: PC
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7F
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2015-12-10 23:47:48.414811: MCU
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00 34 50
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2015-12-10 23:47:48.427644: PC
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7F
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2015-12-10 23:47:48.428894: MCU
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8D FF 73 96 F5 7B 9F FF FF FF FF FF 27 ED 00 00
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73 54 00 F5 28 04 06 70 96 02 15 19 1C 1E 23 00
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EC E0 04 D7 F8 73 BF FF FF 15 09 25 60 16 92 16
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2015-12-10 23:47:48.725370: PC
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46 B9 6A 00 20 00 0B 00 C0 80 C0 FF C0 00 80 80
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80 FF 80 00 40 80 40 FF 40 00 00 80 00 00 00 0A
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12 16 FE FE FE FE FE FE FE FE FE FE FE FE FE
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2015-12-10 23:47:49.088353: MCU
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46 B9 68
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2015-12-10 23:47:49.099586: PC
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FE
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2015-12-10 23:47:49.102589: MCU
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00 20 00
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2015-12-10 23:47:49.115089: PC
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FE
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2015-12-10 23:47:49.116479: MCU
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0B 0D 21 12 BC 18 3E 1A 05 24 FA 2F B3 34 D1 4A
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52 5E C0 52 DB 73 1A 00 00 08 7D 16
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2015-12-10 23:47:49.266317: PC
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46 B9 6A 00 20 00 0C 71 80 72 80 73 80 74 80 75
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80 76 80 6F 40 70 40 71 40 72 40 73 40 74 40 0A
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74 16 FE FE FE FE FE FE FE FE FE FE FE FE FE FE
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2015-12-10 23:47:49.650397: MCU
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46 B9 68
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2015-12-10 23:47:49.661888: PC
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FE
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2015-12-10 23:47:49.664523: MCU
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00 20 00
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2015-12-10 23:47:49.677636: PC
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FE
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2015-12-10 23:47:49.678633: MCU
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0C 23 BF 23 D3 23 E7 23 F6 24 0F 24 23 47 73 47
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B9 47 E1 48 09 48 36 48 59 09 5B 16
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2015-12-10 23:47:49.944529: PC
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46 B9 6A 00 0E 01 72 40 F6 FF 80 73 81 04 94 16
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2015-12-10 23:47:50.045100: MCU
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46 B9 68 00 07 01 00 70 16
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2015-12-10 23:47:50.116096: PC
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46 B9 6A 00 0B 05 00 00 5A A5 01 79 16
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2015-12-10 23:47:50.190036: MCU
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46 B9 68 00 07 05 00 74 16
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2015-12-10 23:47:50.255407: PC
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46 B9 6A 00 0B 03 00 00 5A A5 01 77 16
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2015-12-10 23:47:53.130695: MCU
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46 B9 68 00 0E 03 F5 28 00 A5 03 27 49 02 AE 16
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2015-12-10 23:47:53.210814: PC
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46 B9 6A 00 8B 22 00 00 5A A5 01 04 01 36 75 81
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07 12 00 6A E5 82 60 03 02 00 02 E4 78 FF F6 D8
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FD 01 02 AF 82 8F 06 1F EE 60 0F 7D 90 7E 01 1D
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BD FF 01 1E ED 4E 70 F7 80 EB 22 AF 82 DF FE 22
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E5 B0 F4 F5 B0 75 82 05 11 31 75 82 D0 11 19 E5
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B0 F4 F5 B0 75 82 64 11 19 E5 B0 F4 F5 B0 75 82
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64 11 19 E5 B0 F4 F5 B0 75 82 64 11 19 E5 B0 F4
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F5 B0 80 D6 75 82 00 22 FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF 49 E8 16
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2015-12-10 23:47:54.003906: MCU
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46 B9 68 00 08 02 54 00 C6 16
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2015-12-10 23:47:54.068777: PC
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46 B9 6A 00 8B 02 00 80 5A A5 FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF 81 F6 16
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2015-12-10 23:47:54.867956: MCU
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46 B9 68 00 08 02 54 00 C6 16
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2015-12-10 23:47:54.932281: PC
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46 B9 6A 00 8B 02 01 00 5A A5 FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF 81 77 16
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2015-12-10 23:47:55.732519: MCU
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46 B9 68 00 08 02 54 00 C6 16
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2015-12-10 23:47:55.796791: PC
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46 B9 6A 00 8B 02 01 80 5A A5 FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF 81 F7 16
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2015-12-10 23:47:56.536325: MCU
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46 B9 68 00 08 02 54 00 C6 16
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2015-12-10 23:47:56.616743: PC
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46 B9 6A 00 4B 04 00 00 5A A5 FF FF FF 00 FF FF
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00 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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00 00 FF A8 FF 91 FF 20 FF FD 03 FF FF FF FF FF
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FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
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FF EC FF FF FF 74 BF F7 BC 9F 39 51 16
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2015-12-10 23:47:57.070169: MCU
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46 B9 68 00 08 04 54 00 C8 16
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@ -80,27 +80,27 @@ class StcGal:
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print("Loading flash: ", end="")
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sys.stdout.flush()
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bindata = self.load_file_auto(self.opts.code_image)
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bindata = self.load_file_auto(self.opts.code_binary)
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# warn if it overflows
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if len(bindata) > code_size:
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print("WARNING: code_image overflows into eeprom segment!", file=sys.stderr)
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print("WARNING: code_binary overflows into eeprom segment!", file=sys.stderr)
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if len(bindata) > (code_size + ee_size):
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print("WARNING: code_image truncated!", file=sys.stderr)
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print("WARNING: code_binary truncated!", file=sys.stderr)
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bindata = bindata[0:code_size + ee_size]
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# add eeprom data if supplied
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if self.opts.eeprom_image:
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if self.opts.eeprom_binary:
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print("Loading EEPROM: ", end="")
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sys.stdout.flush()
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eedata = self.load_file_auto(self.opts.eeprom_image)
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eedata = self.load_file_auto(self.opts.eeprom_binary)
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if len(eedata) > ee_size:
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print("WARNING: eeprom_image truncated!", file=sys.stderr)
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print("WARNING: eeprom_binary truncated!", file=sys.stderr)
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eedata = eedata[0:ee_size]
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if len(bindata) < code_size:
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bindata += bytes(code_size - len(bindata))
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elif len(bindata) > code_size:
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print("WARNING: eeprom_image overlaps code_image!", file=sys.stderr)
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print("WARNING: eeprom_binary overlaps code_binary!", file=sys.stderr)
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bindata = bindata[0:code_size]
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bindata += eedata
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@ -133,7 +133,7 @@ class StcGal:
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return 1
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try:
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if self.opts.code_image:
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if self.opts.code_binary:
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self.program_mcu()
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return 0
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else:
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@ -166,10 +166,9 @@ class StcGal:
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def cli():
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# check arguments
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parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter,
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description="stcgal %s - an STC MCU ISP flash tool\n(C) 2014-2015 Grigori Goronzy\nhttps://github.com/grigorig/stcgal" %stcgal.__version__)
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parser.add_argument("code_image", help="code segment file to flash (BIN/HEX)", type=argparse.FileType("rb"), nargs='?')
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parser.add_argument("eeprom_image", help="eeprom segment file to flash (BIN/HEX)", type=argparse.FileType("rb"), nargs='?')
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parser = argparse.ArgumentParser(description="stcgal %s - an STC MCU ISP flash tool" %stcgal.__version__)
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parser.add_argument("code_binary", help="code segment binary file to flash", type=argparse.FileType("rb"), nargs='?')
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parser.add_argument("eeprom_binary", help="eeprom segment binary file to flash", type=argparse.FileType("rb"), nargs='?')
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parser.add_argument("-P", "--protocol", help="protocol version", choices=["stc89", "stc12a", "stc12", "stc15a", "stc15"], default="stc12")
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parser.add_argument("-p", "--port", help="serial port device", default="/dev/ttyUSB0")
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parser.add_argument("-b", "--baud", help="transfer baud rate (default: 19200)", type=BaudType(), default=19200)
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@ -446,14 +446,13 @@ class Stc15AOption(BaseOption):
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class Stc15Option(BaseOption):
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def __init__(self, msr):
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assert len(msr) == 5
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assert len(msr) == 4
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self.msr = bytearray(msr)
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self.options = (
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("reset_pin_enabled", self.get_reset_pin_enabled, self.set_reset_pin_enabled),
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("clock_source", self.get_clock_source, self.set_clock_source),
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("clock_gain", self.get_clock_gain, self.set_clock_gain),
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("cpu_core_voltage", self.get_core_voltage, self.set_core_voltage),
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("watchdog_por_enabled", self.get_watchdog, self.set_watchdog),
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("watchdog_stop_idle", self.get_watchdog_idle, self.set_watchdog_idle),
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("watchdog_prescale", self.get_watchdog_prescale, self.set_watchdog_prescale),
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@ -604,18 +603,6 @@ class Stc15Option(BaseOption):
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self.msr[2] &= 0xdf
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self.msr[2] |= 0x20 if val else 0x00
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def get_core_voltage(self):
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if self.msr[4] == 0xea: return "low"
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elif self.msr[4] == 0xf7: return "mid"
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elif self.msr[4] == 0xfd: return "high"
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else: return "unknown"
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def set_core_voltage(self, val):
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volt_vals = {"low": 0xea, "mid": 0xf7, "high": 0xfd}
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if val not in volt_vals.keys():
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raise ValueError("must be one of %s" % list(volt_vals.keys()))
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self.msr[4] = volt_vals[val]
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class StcBaseProtocol:
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"""Basic functionality for STC BSL protocols"""
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@ -675,17 +662,13 @@ class StcBaseProtocol:
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print("Target frequency: %.3f MHz" % (self.mcu_clock_hz / 1E6))
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print("Target BSL version: %s" % self.mcu_bsl_version)
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def pulse(self, character=b"\x7f", timeout=0):
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"""Send a sequence of bytes for synchronization with MCU"""
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def pulse(self):
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"""Send a sequence of 0x7f bytes for synchronization"""
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duration = 0
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while True:
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if timeout > 0 and duration > timeout:
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raise serial.SerialTimeoutException("pulse timeout")
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self.ser.write(character)
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self.ser.write(b"\x7f")
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self.ser.flush()
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time.sleep(0.015)
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duration += 0.015
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if self.ser.inWaiting() > 0: break
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def initialize_model(self):
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@ -732,18 +715,12 @@ class StcBaseProtocol:
|
||||
Set up serial port, send sync sequence and get part info.
|
||||
"""
|
||||
|
||||
self.ser = serial.Serial(port=self.port,
|
||||
self.ser = serial.Serial(port=self.port, baudrate=self.baud_handshake,
|
||||
parity=self.PARITY)
|
||||
# set baudrate separately to workaround a bug with the CH340 driver
|
||||
# in older Linux kernels
|
||||
self.ser.baudrate = self.baud_handshake
|
||||
|
||||
# fast timeout values to deal with detection errors
|
||||
self.ser.timeout = 0.5
|
||||
self.ser.interCharTimeout = 0.5
|
||||
|
||||
# avoid glitches if there is something in the input buffer
|
||||
self.ser.flushInput()
|
||||
# conservative timeout values
|
||||
self.ser.timeout = 10.0
|
||||
self.ser.interCharTimeout = 1.0
|
||||
|
||||
print("Waiting for MCU, please cycle power: ", end="")
|
||||
sys.stdout.flush()
|
||||
@ -758,10 +735,6 @@ class StcBaseProtocol:
|
||||
except (StcFramingException, serial.SerialTimeoutException): pass
|
||||
print("done")
|
||||
|
||||
# conservative timeout values
|
||||
self.ser.timeout = 15.0
|
||||
self.ser.interCharTimeout = 1.0
|
||||
|
||||
self.initialize_status(status_packet)
|
||||
self.initialize_model()
|
||||
self.initialize_options(status_packet)
|
||||
@ -1551,7 +1524,7 @@ class Stc15AProtocol(Stc12Protocol):
|
||||
packet += bytes([0x98, 0x00, 0x02, 0x00])
|
||||
packet += bytes([0x98, 0x80, 0x02, 0x00])
|
||||
self.write_packet(packet)
|
||||
self.pulse(timeout=1.0)
|
||||
self.pulse()
|
||||
response = self.read_packet()
|
||||
if response[0] != 0x65:
|
||||
raise StcProtocolException("incorrect magic in handshake packet")
|
||||
@ -1593,7 +1566,7 @@ class Stc15AProtocol(Stc12Protocol):
|
||||
packet += struct.pack(">H", target_trim_start + i)
|
||||
packet += bytes([0x02, 0x00])
|
||||
self.write_packet(packet)
|
||||
self.pulse(timeout=1.0)
|
||||
self.pulse()
|
||||
response = self.read_packet()
|
||||
if response[0] != 0x65:
|
||||
raise StcProtocolException("incorrect magic in handshake packet")
|
||||
@ -1654,7 +1627,7 @@ class Stc15Protocol(Stc15AProtocol):
|
||||
"""Initialize options"""
|
||||
|
||||
# create option state
|
||||
self.options = Stc15Option(status_packet[5:8] + status_packet[12:13] + status_packet[37:38])
|
||||
self.options = Stc15Option(status_packet[5:8] + status_packet[12:13])
|
||||
self.options.print()
|
||||
|
||||
def initialize_status(self, packet):
|
||||
@ -1758,7 +1731,8 @@ class Stc15Protocol(Stc15AProtocol):
|
||||
packet += bytes([0x00, 0x40, 0x80, 0x40, 0xff, 0x40])
|
||||
packet += bytes([0x00, 0x00, 0x80, 0x00, 0xc0, 0x00])
|
||||
self.write_packet(packet)
|
||||
self.pulse(b"\xfe", timeout=1.0)
|
||||
self.ser.write(bytes([0x92, 0x92, 0x92, 0x92]))
|
||||
self.ser.flush()
|
||||
response = self.read_packet()
|
||||
if response[0] != 0x00:
|
||||
raise StcProtocolException("incorrect magic in handshake packet")
|
||||
@ -1777,7 +1751,8 @@ class Stc15Protocol(Stc15AProtocol):
|
||||
for i in range(prog_trim[0] - 3, prog_trim[0] + 3):
|
||||
packet += bytes([i & 0xff, prog_trim[1]])
|
||||
self.write_packet(packet)
|
||||
self.pulse(b"\xfe", timeout=1.0)
|
||||
self.ser.write(bytes([0x92, 0x92, 0x92, 0x92]))
|
||||
self.ser.flush()
|
||||
response = self.read_packet()
|
||||
if response[0] != 0x00:
|
||||
raise StcProtocolException("incorrect magic in handshake packet")
|
||||
@ -1905,7 +1880,7 @@ class Stc15Protocol(Stc15AProtocol):
|
||||
response = self.read_packet()
|
||||
if response[0] != 0x07 or response[1] != 0x54:
|
||||
raise StcProtocolException("incorrect magic in finish packet")
|
||||
print("done")
|
||||
print(" done")
|
||||
|
||||
def program_options(self):
|
||||
print("Setting options: ", end="")
|
||||
@ -1925,9 +1900,7 @@ class Stc15Protocol(Stc15AProtocol):
|
||||
(self.trim_frequency >> 0) & 0xff,
|
||||
0xff])
|
||||
packet += bytes([msr[3]])
|
||||
packet += bytes([0xff] * 23)
|
||||
packet += bytes([msr[4]])
|
||||
packet += bytes([0xff] * 3)
|
||||
packet += bytes([0xff] * 27)
|
||||
packet += bytes([self.trim_value[0], self.trim_value[1] + 0x3f])
|
||||
packet += msr[0:3]
|
||||
self.write_packet(packet)
|
||||
|
||||
Reference in New Issue
Block a user