3 Commits

Author SHA1 Message Date
41cabb587b frontend: also catch I/O errors in pulse phase 2016-01-17 15:16:43 +01:00
6a38127c0d Fix regression with some STC15 parts
The cpu core voltage setting is only available on newer parts, so do not
try to support it on older ones. The option packet is too short on some
parts, which resulted in an assertion hit.

There may be a nicer solution, but this works for now.

Fixes grigorig/stcgal#6.
2016-01-05 07:03:59 +01:00
d3911870c3 Fix initialization with CH340 UARTs
Initialization is messed up on older Linux kernels and that results
in 9600 baud being used unconditionally in some cases. Setting the
baud rate separately seems to work around this successfully.

Fixes grigorig/stcgal#5.
2015-12-15 20:22:25 +01:00
2 changed files with 16 additions and 5 deletions

View File

@ -131,6 +131,10 @@ class StcGal:
sys.stdout.flush();
print("Serial port error: %s" % e, file=sys.stderr)
return 1
except IOError as e:
sys.stdout.flush();
print("I/O error: %s" % e, file=sys.stderr)
return 1
try:
if self.opts.code_image:

View File

@ -446,14 +446,13 @@ class Stc15AOption(BaseOption):
class Stc15Option(BaseOption):
def __init__(self, msr):
assert len(msr) == 5
assert len(msr) >= 4
self.msr = bytearray(msr)
self.options = (
("reset_pin_enabled", self.get_reset_pin_enabled, self.set_reset_pin_enabled),
("clock_source", self.get_clock_source, self.set_clock_source),
("clock_gain", self.get_clock_gain, self.set_clock_gain),
("cpu_core_voltage", self.get_core_voltage, self.set_core_voltage),
("watchdog_por_enabled", self.get_watchdog, self.set_watchdog),
("watchdog_stop_idle", self.get_watchdog_idle, self.set_watchdog_idle),
("watchdog_prescale", self.get_watchdog_prescale, self.set_watchdog_prescale),
@ -468,6 +467,9 @@ class Stc15Option(BaseOption):
("uart2_pin_mode", self.get_uart_pin_mode, self.set_uart_pin_mode),
)
if len(msr) > 4:
self.options += ("cpu_core_voltage", self.get_core_voltage, self.set_core_voltage),
def get_reset_pin_enabled(self):
return not bool(self.msr[2] & 16)
@ -732,8 +734,10 @@ class StcBaseProtocol:
Set up serial port, send sync sequence and get part info.
"""
self.ser = serial.Serial(port=self.port, baudrate=self.baud_handshake,
parity=self.PARITY)
self.ser = serial.Serial(port=self.port, parity=self.PARITY)
# set baudrate separately to work around a bug with the CH340 driver
# on older Linux kernels
self.ser.baudrate = self.baud_handshake
# fast timeout values to deal with detection errors
self.ser.timeout = 0.5
@ -1923,7 +1927,10 @@ class Stc15Protocol(Stc15AProtocol):
0xff])
packet += bytes([msr[3]])
packet += bytes([0xff] * 23)
packet += bytes([msr[4]])
if len(msr) > 4:
packet += bytes([msr[4]])
else:
packet += bytes([0xff])
packet += bytes([0xff] * 3)
packet += bytes([self.trim_value[0], self.trim_value[1] + 0x3f])
packet += msr[0:3]