2017-09-19 17:54:26 +02:00
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[![Build Status](https://travis-ci.org/grigorig/stcgal.svg)](https://travis-ci.org/grigorig/stcgal)
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2015-11-24 21:16:43 +01:00
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stcgal - STC MCU ISP flash tool
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===============================
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2014-01-15 01:09:49 +01:00
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stcgal is a command line flash programming tool for STC MCU Ltd. [1]
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8051 compatible microcontrollers. The name was inspired by avrdude [2].
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2016-05-14 13:21:43 +02:00
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STC microcontrollers have an UART/USB based boot strap loader (BSL). It
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2014-01-15 01:09:49 +01:00
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utilizes a packet-based protocol to flash the code memory and IAP
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2016-05-14 13:21:43 +02:00
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memory over a serial link. This is referred to as in-system programming
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(ISP). The BSL is also used to configure various (fuse-like) device
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2014-01-15 01:09:49 +01:00
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options. Unfortunately, this protocol is not publicly documented and
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STC only provide a (crude) Windows GUI application for programming.
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2016-05-14 13:21:43 +02:00
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stcgal is a full-featured Open Source replacement for STC's Windows
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software; it supports a wide range of MCUs, it is very portable and
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suitable for automation.
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2014-01-15 01:09:49 +01:00
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[1] http://stcmcu.com/
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[2] http://www.nongnu.org/avrdude/
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Supported MCU models
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--------------------
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2018-08-21 01:48:09 +02:00
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stcgal should fully support STC 89/90/10/11/12/15 series MCUs. Support for STC8 series MCUs is work in progress.
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2014-01-15 01:09:49 +01:00
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So far, stcgal was tested with the following MCU models:
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2016-11-22 10:20:06 +01:00
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* STC89C52RC (BSL version: 4.3C/6.6C)
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2016-05-12 01:19:31 +02:00
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* STC90C52RC (BSL version: 4.3C)
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* STC89C54RD+ (BSL version: 4.3C)
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* STC12C2052 (BSL version: 5.8D)
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2014-01-28 23:58:51 +01:00
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* STC12C2052AD (BSL version: 5.8D)
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2016-05-12 01:19:31 +02:00
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* STC12C5608AD (BSL version: 6.0G)
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* STC12C5A16S2 (BSL version: 6.2I)
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2016-11-22 10:20:06 +01:00
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* STC12C5A60S2 (BSL version: 6.2I/7.1I)
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2015-12-06 19:44:48 +01:00
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* STC11F02E (BSL version: 6.5K)
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2016-05-12 01:19:31 +02:00
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* STC10F04XE (BSL version: 6.5J)
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2014-01-15 01:09:49 +01:00
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* STC11F08XE (BSL version: 6.5M)
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2016-05-12 01:19:31 +02:00
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* STC12C5204AD (BSL version: 6.6H)
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2014-01-15 01:09:49 +01:00
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* STC15F104E (BSL version: 6.7Q)
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2015-11-19 00:37:31 +01:00
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* STC15F204EA (BSL version: 6.7R)
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2016-05-12 01:19:31 +02:00
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* STC15L104W (BSL version: 7.1.4Q)
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* STC15F104W (BSL version: 7.1.4Q)
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* IAP15F2K61S2 (BSL version: 7.1.4S)
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2015-11-30 00:51:51 +01:00
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* STC15L2K16S2 (BSL version: 7.2.4S)
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2015-12-12 01:02:40 +01:00
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* STC15W408AS (BSL version: 7.2.4T)
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2016-05-14 13:21:43 +02:00
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* STC15W4K56S4 (BSL version: 7.3.4T, UART and USB mode)
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2018-08-21 01:48:09 +02:00
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* STC8A8K64S4A12 (BSL version: 7.3.9U)
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2014-01-15 01:09:49 +01:00
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2016-05-12 01:19:31 +02:00
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Compatibility reports, both negative and positive, are welcome.
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2014-01-15 01:09:49 +01:00
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Features
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--------
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2016-05-14 13:21:43 +02:00
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* UART and USB BSL support
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2014-01-15 01:09:49 +01:00
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* Display part info
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2015-11-24 00:40:40 +01:00
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* Determine operating frequency
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2014-01-15 01:09:49 +01:00
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* Program flash memory
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* Program IAP/EEPROM
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* Set device options
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2018-08-21 01:48:09 +02:00
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* Read unique device ID (STC 10/11/12/15/8)
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* Trim RC oscillator frequency (STC 15/8)
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2017-10-08 22:58:31 +02:00
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* Automatic power-cycling with DTR toggle or a custom shell command
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2016-05-14 13:21:43 +02:00
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* Automatic UART protocol detection
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2014-01-15 01:09:49 +01:00
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Installation
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------------
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2016-05-14 13:21:43 +02:00
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stcgal requires Python 3.2 (or later) and pySerial. USB support is
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optional and requires pyusb 1.0.0b2 or later. You can run stcgal
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2015-11-23 19:53:14 +01:00
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directly with the included ```stcgal.py``` script. The recommended
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method for permanent installation is to use Python's setuptools. Run
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```./setup.py build``` to build and ```sudo ./setup.py install```
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2015-11-24 21:16:43 +01:00
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to install stcgal. A permanent installation provides the ```stcgal```
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command.
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2014-01-15 01:09:49 +01:00
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Usage
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-----
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2015-11-24 21:16:43 +01:00
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Call stcgal with ```-h``` for usage information.
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2014-01-15 01:09:49 +01:00
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2015-11-23 15:19:01 +01:00
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```
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2016-05-12 01:07:27 +02:00
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usage: stcgal.py [-h] [-a] [-P {stc89,stc12a,stc12,stc15a,stc15,auto}]
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[-p PORT] [-b BAUD] [-l HANDSHAKE] [-o OPTION] [-t TRIM] [-D]
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2016-04-02 23:13:51 +02:00
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[code_image] [eeprom_image]
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2015-11-23 15:19:01 +01:00
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2015-11-24 00:44:34 +01:00
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stcgal 1.0 - an STC MCU ISP flash tool
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2016-04-02 23:13:51 +02:00
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(C) 2014-2015 Grigori Goronzy
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https://github.com/grigorig/stcgal
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2015-11-23 15:19:01 +01:00
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positional arguments:
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2016-04-02 23:13:51 +02:00
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code_image code segment file to flash (BIN/HEX)
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eeprom_image eeprom segment file to flash (BIN/HEX)
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2015-11-23 15:19:01 +01:00
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optional arguments:
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-h, --help show this help message and exit
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2016-04-02 23:13:51 +02:00
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-a, --autoreset cycle power automatically by asserting DTR
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2017-10-08 22:58:31 +02:00
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-r RESETCMD, --resetcmd RESETCMD
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Use this shell command for board power-cycling
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(instead of DTR assertion)
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2016-05-12 01:07:27 +02:00
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-P {stc89,stc12a,stc12,stc15a,stc15,auto}, --protocol {stc89,stc12a,stc12,stc15a,stc15,auto}
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2015-11-23 15:19:01 +01:00
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protocol version
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-p PORT, --port PORT serial port device
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-b BAUD, --baud BAUD transfer baud rate (default: 19200)
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-l HANDSHAKE, --handshake HANDSHAKE
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2016-05-12 01:07:27 +02:00
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handshake baud rate (default: 2400)
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2015-11-23 15:19:01 +01:00
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-o OPTION, --option OPTION
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set option (can be used multiple times)
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-t TRIM, --trim TRIM RC oscillator frequency in kHz (STC15 series only)
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-D, --debug enable debug output
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```
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Most importantly, ```-p``` sets the serial port to be used for programming.
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2015-11-22 18:05:45 +01:00
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### Protocols
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2015-11-19 00:38:05 +01:00
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2015-11-22 18:05:45 +01:00
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STC MCUs use a variety of related but incompatible protocols for the
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2016-05-20 02:59:35 +02:00
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BSL. The protocol can be specified with the ```-P``` flag. By default
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UART protocol autodetection is used. The mapping between protocols
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and MCU series is as follows:
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* ```stc89``` STC89/90 series
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* ```stc12a``` STC12x052 series and possibly others
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* ```stc12b``` STC12x52 series, STC12x56 series and possibly others
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* ```stc12``` Most STC10/11/12 series
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2015-11-22 18:09:49 +01:00
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* ```stc15a``` STC15x104E and STC15x204E(A) series
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* ```stc15``` Most STC15 series
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2018-08-21 01:48:09 +02:00
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* ```stc8``` STC8 series
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2016-05-14 13:21:43 +02:00
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* ```usb15``` USB support on STC15W4 series
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2016-05-20 02:59:35 +02:00
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* ```auto``` Automatic detection of UART based protocols (default)
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2014-01-15 01:09:49 +01:00
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The text files in the doc/ subdirectory provide an overview over
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the reverse engineered protocols used by the BSLs. For more details,
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please read the source code.
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2015-11-22 18:05:45 +01:00
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### Getting MCU information
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Call stcgal without any file to program. It will dump information
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about the MCU, e.g.:
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```
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$ ./stcgal.py -P stc15
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Waiting for MCU, please cycle power: done
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Target model:
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Name: IAP15F2K61S2
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Magic: F449
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Code flash: 61.0 KB
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EEPROM flash: 0.0 KB
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2015-11-24 00:40:40 +01:00
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Target frequency: 10.046 MHz
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2015-11-22 18:05:45 +01:00
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Target BSL version: 7.1S
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2015-11-24 00:40:40 +01:00
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Target wakeup frequency: 34.771 KHz
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2015-11-22 18:05:45 +01:00
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Target options:
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reset_pin_enabled=False
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clock_source=internal
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clock_gain=high
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watchdog_por_enabled=False
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watchdog_stop_idle=True
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watchdog_prescale=256
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low_voltage_reset=True
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low_voltage_threshold=3
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eeprom_lvd_inhibit=True
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eeprom_erase_enabled=False
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bsl_pindetect_enabled=False
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2015-11-24 00:40:40 +01:00
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por_reset_delay=long
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2015-11-22 18:05:45 +01:00
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rstout_por_state=high
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2015-11-24 00:40:40 +01:00
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uart2_passthrough=False
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uart2_pin_mode=normal
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2015-11-24 00:44:34 +01:00
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Disconnected!
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2015-11-22 18:05:45 +01:00
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```
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### Program the flash memory
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2015-11-24 00:40:40 +01:00
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stcgal supports Intel HEX encoded files as well as binary files. Intel
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HEX is autodetected by file extension (.hex, .ihx or .ihex).
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2015-11-22 18:05:45 +01:00
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2015-11-24 00:44:34 +01:00
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Call stcgal just like before, but provide the path to the code image:
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2015-11-22 18:05:45 +01:00
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```
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2015-11-24 00:40:40 +01:00
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$ ./stcgal.py -P stc15 hello.hex
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2015-11-22 18:05:45 +01:00
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Waiting for MCU, please cycle power: done
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Target model:
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Name: IAP15F2K61S2
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Magic: F449
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Code flash: 61.0 KB
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EEPROM flash: 0.0 KB
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2015-11-24 00:40:40 +01:00
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Target frequency: 10.046 MHz
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2015-11-22 18:05:45 +01:00
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Target BSL version: 7.1S
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2015-11-24 00:40:40 +01:00
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Target wakeup frequency: 34.771 KHz
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2015-11-22 18:05:45 +01:00
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Target options:
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reset_pin_enabled=False
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clock_source=internal
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clock_gain=high
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watchdog_por_enabled=False
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watchdog_stop_idle=True
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watchdog_prescale=256
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low_voltage_reset=True
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low_voltage_threshold=3
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eeprom_lvd_inhibit=True
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eeprom_erase_enabled=False
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bsl_pindetect_enabled=False
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2015-11-24 00:40:40 +01:00
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por_reset_delay=long
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2015-11-22 18:05:45 +01:00
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rstout_por_state=high
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2015-11-24 00:40:40 +01:00
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uart2_passthrough=False
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uart2_pin_mode=normal
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Loading flash: 80 bytes (Intel HEX)
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Trimming frequency: 10.046 MHz
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2015-11-22 18:05:45 +01:00
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Switching to 19200 baud: done
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Erasing flash: done
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Writing 256 bytes: .... done
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Setting options: done
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Target UID: 0D000021022632
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Disconnected!
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```
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You can also program the EEPROM part of the memory, if applicable. Add
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2015-11-24 00:44:34 +01:00
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the EEPROM image path to the commandline after the flash image path.
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2015-11-22 18:05:45 +01:00
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stcgal uses a conservative baud rate of 19200 bps by
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default. Programming can be sped up by choosing a faster baud rate
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with the flag ```-b```.
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### Device options
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stcgal dumps a number of target options. These can be modified as
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well. Provide one (or more) ```-o``` flags followed by a key-value
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2015-11-23 15:19:01 +01:00
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pair on the commandline to adjust these settings. For instance, you can
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enable the external crystal as clock source:
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```
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$ ./stcgal.py -P stc15 -o clock_source=external hello.bin
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```
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Please note that device options can only be set when flash memory is
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programmed!
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2015-11-22 18:05:45 +01:00
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2015-11-23 23:29:22 +01:00
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#### Option keys
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Not all parts support all options. The protocols or parts that support each option are listed in the description.
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2015-11-24 21:16:43 +01:00
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Option key | Possible values | Protocols/Models | Description
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------------------------------|-------------------|---------------------|------------
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```cpu_6t_enabled``` | true/false | STC89 only | 6T fast mode
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```bsl_pindetect_enabled``` | true/false | All | BSL only enabled when P3.2/P3.3 or P1.0/P1.1 (depends on model) are low
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```eeprom_erase_enabled``` | true/false | All | Erase EEPROM with next programming cycle
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```clock_gain``` | low/high | All with XTAL pins | Clock gain for external crystal
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```ale_enabled``` | true/false | STC89 only | ALE pin enabled if true, normal GPIO if false
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```xram_enabled``` | true/false | STC89 only | Use internal XRAM (STC89 only)
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```watchdog_por_enabled``` | true/false | All | Watchdog state after power-on reset (POR)
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2016-05-18 01:21:54 +02:00
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```low_voltage_reset``` | low/high | STC12A/STC12 | Low-voltage reset level (low: ~3.3V, high: ~3.7V)
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```low_voltage_reset``` | true/false | STC12 | Enable RESET2 pin low voltage detect
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```low_voltage_reset``` | true/false | STC15A | Enable low-voltage reset (brownout)
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2015-11-24 21:16:43 +01:00
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```clock_source``` | internal/external | STC12A+ with XTAL | Use internal (RC) or external (crystal) clock
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```watchdog_stop_idle``` | true/false | STC12A+ | Stop watchdog in IDLE mode
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```watchdog_prescale``` | 2,4,8,...,256 | STC12A+ | Watchdog timer prescaler, must be a power of two.
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```reset_pin_enabled``` | true/false | STC12+ | RESET pin enabled if true, normal GPIO if false
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```oscillator_stable_delay``` | 4096,...,32768 | STC11F series only | Crystal stabilization delay in clocks. Must be a power of two.
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```por_reset_delay``` | short/long | STC12+ | Power-on reset (POR) delay
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```low_voltage_threshold``` | 0...7 | STC15A+ | Low-voltage detection threshold. Model specific.
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```eeprom_lvd_inhibit``` | true/false | STC15A+ | Ignore EEPROM writes in low-voltage situations
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2018-08-21 01:48:09 +02:00
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```rstout_por_state``` | low/high | STC15+ | RSTOUT/RSTSV pin state after power-on reset
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```uart1_remap``` | true/false | STC8 | Remap UART1 pins (P3.0/P3.1) to UART2 pins (P3.6/P3.7)
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2015-11-24 21:16:43 +01:00
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```uart2_passthrough``` | true/false | STC15+ | Pass-through UART1 to UART2 pins (for single-wire UART mode)
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```uart2_pin_mode``` | push-pull/normal | STC15+ | Output mode of UART2 TX pin
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2015-12-11 01:09:47 +01:00
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```cpu_core_voltage``` | low/mid/high | STC15W+ | CPU core voltage (low: ~2.7V, mid: ~3.3V, high: ~3.6V)
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2018-08-21 01:48:09 +02:00
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```epwm_open_drain``` | true/false | STC8 | Use open-drain pin mode for EPWM pins after power-on reset
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```program_eeprom_split``` | 512 - 65024 | STC8A8 w/ 64 KB | Select split between code flash and EEPROM flash (in 512 byte blocks)
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2015-11-23 23:29:22 +01:00
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2015-11-22 18:05:45 +01:00
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### Frequency trimming
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If the internal RC oscillator is used (```clock_source=internal```),
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stcgal can execute a trim procedure to adjust it to a given value. This
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2018-08-21 01:48:09 +02:00
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is only supported by STC15 series and newer. The trim values are stored
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with device options. Use the ```-t``` flag to request trimming to a certain
|
2015-11-22 18:05:45 +01:00
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value. Generally, frequencies between 4 and 35 MHz can be achieved. If
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trimming fails, stcgal will abort.
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|
2016-04-02 23:13:51 +02:00
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### Automatic power-cycling
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STC's microcontrollers require a power-on reset to invoke the bootloader,
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which can be inconvenient. stcgal can use the DTR control signal of a
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serial interface to automate this. The DTR signal is asserted for
|
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|
approximately 500 ms when the autoreset feature is enabled with the
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```-a``` flag. This requires external circuitry to actually switch the
|
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power. In some cases, when the microcontroller draws only little power,
|
2017-10-08 22:58:31 +02:00
|
|
|
it is possible to directly supply power from the DTR signal.
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As an alternative to DTR, you can use a custom shell command or an external
|
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|
|
script (via -r option) to reset the device. You should specify the command
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|
along with -a option. Do not forget the quotes!
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Example:
|
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|
|
```
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$ ./stcgal.py -P stc15 -a -r "echo 1 > /sys/class/gpio/gpio666/value"
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|
|
|
```
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or
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```
|
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|
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$ ./stcgal.py -P stc15 -a -r "./powercycle.sh"
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|
|
```
|
2016-04-02 23:13:51 +02:00
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|
2016-05-12 01:48:02 +02:00
|
|
|
### Exit status
|
|
|
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|
|
The exit status is 0 if no error occured while executing stcgal. Any
|
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|
|
error, such as a protocol error or I/O error, results in an exit
|
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|
|
status of 1. If the the user aborted stcgal by pressing CTRL-C,
|
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|
|
that results in an exit status of 2.
|
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|
2016-05-14 13:21:43 +02:00
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|
|
### USB support
|
|
|
|
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|
|
STC15W4 series have an USB-based BSL that can be optionally
|
|
|
|
used. USB support in stcgal is experimental and might change in the
|
|
|
|
future. USB mode is enabled by using the ```usb15``` protocol. The
|
|
|
|
port (```-p```) flag as well as the baudrate options are ignored for
|
|
|
|
the USB protocol. RC frequency trimming is not supported.
|
|
|
|
|
2014-01-15 01:09:49 +01:00
|
|
|
License
|
|
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|
-------
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stcgal is published under the MIT license.
|