Possible fix/workaround for OSX frequency trimming

This allows stcgal to be started with "python3 -m stcgal" or similar.
Addresses stcgal#24.

README.md

@@ -25,14 +25,14 @@ stcgal should fully support STC 89/90/10/11/12/15 series MCUs.
 
 So far, stcgal was tested with the following MCU models:
 
-* STC89C52RC (BSL version: 4.3C)
+* STC89C52RC (BSL version: 4.3C/6.6C)
 * STC90C52RC (BSL version: 4.3C)
 * STC89C54RD+ (BSL version: 4.3C)
 * STC12C2052 (BSL version: 5.8D)
 * STC12C2052AD (BSL version: 5.8D)
 * STC12C5608AD (BSL version: 6.0G)
 * STC12C5A16S2 (BSL version: 6.2I)
-* STC12C5A60S2 (BSL version: 6.2I)
+* STC12C5A60S2 (BSL version: 6.2I/7.1I)
 * STC11F02E (BSL version: 6.5K)
 * STC10F04XE (BSL version: 6.5J)
 * STC11F08XE (BSL version: 6.5M)

debian/changelog

@@ -1,3 +1,9 @@
+stcgal (1.3) unstable; urgency=low
+
+  * Update to 1.3
+
+ -- Grigori Goronzy <greg@chown.ath.cx>  Sat, 10 Jun 2017 10:01:07 +0200
+
 stcgal (1.2) unstable; urgency=low
 
   * Update to 1.2

doc/stc15-usb-protocol.txt

@@ -0,0 +1,46 @@
+STC15 series USB ISP protocol
+=============================
+
+General principle
+-----------------
+
+- host does OUT and IN control transfers for write and read
+- IN transfer with wLength = 132, wValue = 0, wIndex = 0, bRequest = 0 are used for all reads
+- OUT transfers with with specific bRequest, wValue, wIndex are used for writes
+
+
+Packet coding
+-------------
+
+- packets from MCU
+  always start with 0x46 0xb9, similar to serial protocols
+  third byte is packet length, followed by data bytes
+  checksum at the end: 8 bit modular sum
+
+- packets from host
+  no header bytes
+  bRequest sets packet type
+  wValue, wIndex interpretation according to packet type
+  8 bit modular checksum for every 7 bytes, interleaved
+  
+- packet types derived from the serial protocol
+
+Specific packet information
+---------------------------
+
+- flash data
+  wIndex specifies write address
+  wValue is 0xa55a
+  bRequest is 0x22 for first packet, 0x02 for the following ones
+  unusually encoded: a total of 128 bytes per packet,
+  with every 7 byte checksummed in some way,
+  for a total of 18x7 byte segments and a final 2 byte segment
+  checksum: 8 bit modular sum
+
+- option packet
+  generally same as with serial protocol, some header stuff omitted
+  wIndex is 0
+  wValue is 0xa55a
+  bRequest is 4
+  seems to use the same checksumming scheme as flash writes
+

stcgal/__init__.py

@@ -1 +1 @@
-__version__ = "1.2"
+__version__ = "1.3"

stcgal/__main__.py

@@ -0,0 +1,27 @@
+#
+# Copyright (c) 2013-2015 Grigori Goronzy <greg@chown.ath.cx>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+
+import sys
+import stcgal.frontend
+
+if __name__ == "__main__":
+    sys.exit(stcgal.frontend.cli())

stcgal/frontend.py

@@ -192,7 +192,7 @@ class StcGal:
 def cli():
     # check arguments
     parser = argparse.ArgumentParser(formatter_class=argparse.RawDescriptionHelpFormatter,
-                                     description="stcgal %s - an STC MCU ISP flash tool\n(C) 2014-2015 Grigori Goronzy\nhttps://github.com/grigorig/stcgal" %stcgal.__version__)
+                                     description="stcgal %s - an STC MCU ISP flash tool\n(C) 2014-2017 Grigori Goronzy\nhttps://github.com/grigorig/stcgal" %stcgal.__version__)
     parser.add_argument("code_image", help="code segment file to flash (BIN/HEX)", type=argparse.FileType("rb"), nargs='?')
     parser.add_argument("eeprom_image", help="eeprom segment file to flash (BIN/HEX)", type=argparse.FileType("rb"), nargs='?')
     parser.add_argument("-a", "--autoreset", help="cycle power automatically by asserting DTR", action="store_true")

stcgal/protocols.py

@@ -114,7 +114,11 @@ class StcBaseProtocol:
 
         # read and check frame start magic
         packet = bytes()
-        packet += self.read_bytes_safe(1)
+        # XXX: skip extraneous 0xFE byte?
+        leading = self.read_bytes_safe(1)
+        if leading == 0xfe:
+            leading = self.read_bytes_safe(1)
+        packet += leading
         # Some (?) BSL versions don't send a frame start with the status
         # packet. Let's be liberal and accept that always, just in case.
         if packet[0] == self.PACKET_MCU[0]:
@@ -891,8 +895,6 @@ class Stc12BaseProtocol(StcBaseProtocol):
             response = self.read_packet()
             if response[0] != 0x00:
                 raise StcProtocolException("incorrect magic in write packet")
-            elif response[1] != csum:
-                raise StcProtocolException("verification checksum mismatch")
             print(".", end="")
             sys.stdout.flush()
         print(" done")
@@ -1295,7 +1297,7 @@ class Stc15Protocol(Stc15AProtocol):
         # This is a bit of a hack, but it works.
         bauds = self.baud_transfer if (self.mcu_magic >> 8) == 0xf2 else self.baud_transfer * 4
         packet += struct.pack(">H", int(65535 - program_speed / bauds))
-        packet += struct.pack(">H", int(65535 - (program_speed / bauds) * 1.5))
+        packet += bytes(user_trim)
         iap_wait = self.get_iap_delay(program_speed)
         packet += bytes([iap_wait])
         self.write_packet(packet)