Fix some minor code smells reported by pylint
No functional change intended.
This commit is contained in:
Grigori Goronzy
parent
2e822375e0
commit
f15b64f4f7
@ -20,7 +20,7 @@
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# SOFTWARE.
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#
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import sys, os, time, struct
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import sys
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import argparse
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import stcgal
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from stcgal.utils import Utils, BaudType
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@ -69,7 +69,7 @@ class Stc89Option(BaseOption):
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return not bool(self.msr & 1)
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def set_t6(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0xfe
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self.msr |= 0x01 if not bool(val) else 0x00
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@ -77,7 +77,7 @@ class Stc89Option(BaseOption):
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return not bool(self.msr & 4)
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def set_pindetect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0xfb
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self.msr |= 0x04 if not bool(val) else 0x00
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@ -85,7 +85,7 @@ class Stc89Option(BaseOption):
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return not bool(self.msr & 8)
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def set_ee_erase(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0xf7
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self.msr |= 0x08 if not bool(val) else 0x00
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@ -104,7 +104,7 @@ class Stc89Option(BaseOption):
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return bool(self.msr & 32)
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def set_ale(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0xdf
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self.msr |= 0x20 if bool(val) else 0x00
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@ -112,7 +112,7 @@ class Stc89Option(BaseOption):
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return bool(self.msr & 64)
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def set_xram(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0xbf
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self.msr |= 0x40 if bool(val) else 0x00
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@ -120,7 +120,7 @@ class Stc89Option(BaseOption):
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return not bool(self.msr & 128)
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def set_watchdog(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr &= 0x7f
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self.msr |= 0x80 if not bool(val) else 0x00
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@ -169,7 +169,7 @@ class Stc12AOption(BaseOption):
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return not bool(self.msr[1] & 32)
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def set_watchdog(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0xdf
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self.msr[1] |= 0x20 if not val else 0x00
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@ -177,7 +177,7 @@ class Stc12AOption(BaseOption):
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return not bool(self.msr[1] & 8)
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def set_watchdog_idle(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0xf7
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self.msr[1] |= 0x08 if not val else 0x00
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@ -196,7 +196,7 @@ class Stc12AOption(BaseOption):
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return not bool(self.msr[2] & 2)
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def set_ee_erase(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xfd
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self.msr[2] |= 0x02 if not val else 0x00
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@ -204,7 +204,7 @@ class Stc12AOption(BaseOption):
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return not bool(self.msr[2] & 1)
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def set_pindetect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xfe
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self.msr[2] |= 0x01 if not val else 0x00
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@ -235,7 +235,7 @@ class Stc12Option(BaseOption):
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return bool(self.msr[0] & 1)
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def set_reset_pin_enabled(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[0] &= 0xfe
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self.msr[0] |= 0x01 if bool(val) else 0x00
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@ -243,7 +243,7 @@ class Stc12Option(BaseOption):
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return not bool(self.msr[0] & 64)
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def set_low_voltage_detect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[0] &= 0xbf
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self.msr[0] |= 0x40 if not val else 0x00
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@ -295,7 +295,7 @@ class Stc12Option(BaseOption):
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return not bool(self.msr[2] & 32)
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def set_watchdog(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xdf
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self.msr[2] |= 0x20 if not val else 0x00
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@ -303,7 +303,7 @@ class Stc12Option(BaseOption):
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return not bool(self.msr[2] & 8)
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def set_watchdog_idle(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xf7
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self.msr[2] |= 0x08 if not val else 0x00
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@ -322,7 +322,7 @@ class Stc12Option(BaseOption):
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return not bool(self.msr[3] & 2)
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def set_ee_erase(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[3] &= 0xfd
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self.msr[3] |= 0x02 if not val else 0x00
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@ -330,7 +330,7 @@ class Stc12Option(BaseOption):
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return not bool(self.msr[3] & 1)
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def set_pindetect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[3] &= 0xfe
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self.msr[3] |= 0x01 if not val else 0x00
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@ -359,7 +359,7 @@ class Stc15AOption(BaseOption):
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return bool(self.msr[0] & 16)
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def set_reset_pin_enabled(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[0] &= 0xef
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self.msr[0] |= 0x10 if bool(val) else 0x00
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@ -367,7 +367,7 @@ class Stc15AOption(BaseOption):
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return not bool(self.msr[2] & 32)
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def set_watchdog(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xdf
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self.msr[2] |= 0x20 if not val else 0x00
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@ -375,7 +375,7 @@ class Stc15AOption(BaseOption):
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return not bool(self.msr[2] & 8)
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def set_watchdog_idle(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xf7
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self.msr[2] |= 0x08 if not val else 0x00
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@ -394,7 +394,7 @@ class Stc15AOption(BaseOption):
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return bool(self.msr[1] & 64)
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def set_lvrs(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0xbf
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self.msr[1] |= 0x40 if val else 0x00
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@ -402,7 +402,7 @@ class Stc15AOption(BaseOption):
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return bool(self.msr[1] & 128)
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def set_eeprom_lvd(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0x7f
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self.msr[1] |= 0x80 if val else 0x00
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@ -420,7 +420,7 @@ class Stc15AOption(BaseOption):
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return not bool(self.msr[12] & 2)
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def set_ee_erase(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[12] &= 0xfd
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self.msr[12] |= 0x02 if not val else 0x00
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@ -428,7 +428,7 @@ class Stc15AOption(BaseOption):
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return not bool(self.msr[12] & 1)
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def set_pindetect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[12] &= 0xfe
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self.msr[12] |= 0x01 if not val else 0x00
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@ -463,7 +463,7 @@ class Stc15Option(BaseOption):
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return not bool(self.msr[2] & 16)
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def set_reset_pin_enabled(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[2] &= 0xef
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self.msr[2] |= 0x10 if not bool(val) else 0x00
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@ -493,7 +493,7 @@ class Stc15Option(BaseOption):
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return not bool(self.msr[0] & 32)
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def set_watchdog(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[0] &= 0xdf
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self.msr[0] |= 0x20 if not val else 0x00
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@ -501,7 +501,7 @@ class Stc15Option(BaseOption):
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return not bool(self.msr[0] & 8)
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def set_watchdog_idle(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[0] &= 0xf7
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self.msr[0] |= 0x08 if not val else 0x00
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@ -520,7 +520,7 @@ class Stc15Option(BaseOption):
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return not bool(self.msr[1] & 64)
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def set_lvrs(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0xbf
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self.msr[1] |= 0x40 if not val else 0x00
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@ -528,7 +528,7 @@ class Stc15Option(BaseOption):
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return bool(self.msr[1] & 128)
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def set_eeprom_lvd(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[1] &= 0x7f
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self.msr[1] |= 0x80 if val else 0x00
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@ -546,7 +546,7 @@ class Stc15Option(BaseOption):
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return bool(self.msr[3] & 2)
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def set_ee_erase(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[3] &= 0xfd
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self.msr[3] |= 0x02 if val else 0x00
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@ -554,7 +554,7 @@ class Stc15Option(BaseOption):
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return not bool(self.msr[3] & 1)
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def set_pindetect(self, val):
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val = Utils.to_bool(val);
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val = Utils.to_bool(val)
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self.msr[3] &= 0xfe
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self.msr[3] |= 0x01 if not val else 0x00
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@ -142,7 +142,7 @@ class StcBaseProtocol:
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packet += self.read_bytes_safe(packet_len - 3)
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# verify checksum and extract payload
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payload = self.extract_payload(packet);
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payload = self.extract_payload(packet)
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self.dump_packet(packet, receive=True)
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@ -192,12 +192,12 @@ class StcBaseProtocol:
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mcu_name += "E" if self.status_packet[17] < 0x70 else "W"
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self.model = self.model._replace(name = mcu_name)
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protocol_database = [("stc89", "STC(89|90)(C|LE)\d"),
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("stc12a", "STC12(C|LE)\d052"),
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("stc12b", "STC12(C|LE)(52|56)"),
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("stc12", "(STC|IAP)(10|11|12)\D"),
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("stc15a", "(STC|IAP)15[FL][01]0\d(E|EA|)$"),
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("stc15", "(STC|IAP|IRC)15\D")]
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protocol_database = [("stc89", r"STC(89|90)(C|LE)\d"),
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("stc12a", r"STC12(C|LE)\d052"),
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("stc12b", r"STC12(C|LE)(52|56)"),
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("stc12", r"(STC|IAP)(10|11|12)\D"),
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("stc15a", r"(STC|IAP)15[FL][01]0\d(E|EA|)$"),
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("stc15", r"(STC|IAP|IRC)15\D")]
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for protocol_name, pattern in protocol_database:
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if re.match(pattern, self.model.name):
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@ -886,7 +886,6 @@ class Stc12BaseProtocol(StcBaseProtocol):
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packet += struct.pack(">H", self.PROGRAM_BLOCKSIZE)
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packet += data[i:i+self.PROGRAM_BLOCKSIZE]
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while len(packet) < self.PROGRAM_BLOCKSIZE + 7: packet += b"\x00"
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csum = sum(packet[7:]) & 0xff
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self.write_packet(packet)
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response = self.read_packet()
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if response[0] != 0x00:
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@ -965,7 +964,7 @@ class Stc15AProtocol(Stc12Protocol):
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bl_version, bl_stepping = struct.unpack("BB", packet[17:19])
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self.mcu_bsl_version = "%d.%d%s" % (bl_version >> 4, bl_version & 0x0f,
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chr(bl_stepping))
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chr(bl_stepping))
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self.trim_data = packet[51:58]
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self.freq_counter = freq_counter
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@ -1177,8 +1176,7 @@ class Stc15Protocol(Stc15AProtocol):
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bl_version, bl_stepping = struct.unpack("BB", packet[17:19])
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bl_minor = packet[22] & 0x0f
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self.mcu_bsl_version = "%d.%d.%d%s" % (bl_version >> 4, bl_version & 0x0f,
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bl_minor,
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chr(bl_stepping))
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bl_minor, chr(bl_stepping))
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self.bsl_version = bl_version
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def print_mcu_info(self):
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@ -1502,7 +1500,7 @@ class StcUsb15Protocol(Stc15Protocol):
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self.dump_packet(chunks, request, value, index, receive=False)
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host2dev = usb.util.CTRL_TYPE_VENDOR | usb.util.CTRL_RECIPIENT_DEVICE | usb.util.CTRL_OUT
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self.dev.ctrl_transfer(host2dev, request, value, index, chunks);
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self.dev.ctrl_transfer(host2dev, request, value, index, chunks)
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def connect(self, autoreset=False):
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"""Connect to USB device and read info packet"""
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