Add STC 89/90 series protocol support

doc/stc89-options.txt

@@ -0,0 +1,22 @@
+Model-specific configuration registers
+Placement of configuration values
+
+"~" means the bit is a negated boolean. Sometimes values overlap,
+depending on MCU model.
+
+In STC89 series, there is only a single MCS byte.
+
+MCS0
+----
+
+MSB     7       6       5       4       3       2       1       0       LSB
+        ~WDEN   XRAM    ALE     OSCG    ~EERE   ~BSLD   0       ~CPU6T
+
+~WDEN := watchdog enable after power-on-reset
+XRAM := enable access to internal XRAM
+ALE := enable ALE pin function (otherwise, it's just regular GPIO)
+OSCG := high oscillator gain
+~EREE := enable eeprom erase next time MCU is programmed
+~BSLD := enable BSL pin detect; i.e. BSL is only enabled if P1.0/P1.1
+         (or others, depends on MCU model) are held low on POR.
+~CPU6T := enable double speed (6T cycles instead of 12T cycles) mode       

doc/stc89-protocol.txt

@@ -6,7 +6,9 @@ Differences to STC12:
 
 * Uses NONE parity instead of EVEN parity.
 
-* Checksum calculations are different: only a single-byte modular sum is used.
+* Status packet is sent without frame start magic.
+
+* Checksum calculations are different: a single-byte modular sum is used.
 
 * Baudrate handshake isn't initiated with a type 0x50 packet; this is simply
   skipped.
@@ -23,12 +25,16 @@ Differences to STC12:
   is simply skipped.
 
 * Baudrate handshake
-  - Uses normal speed (/32) UART timing instead of double speed (/16)
+  - Uses normal speed (/32) UART timing in 12T mode and double speed (/16)
+    in 6T mode
   - IAP delay has some differences (see datasheet)
 
 * Erase procedure
   - A different magic sequence is used
     (6 bytes with value 0x33)
-  - No size/range is supplied
+  - Only a single size is supplied
   - response code has type 0x80
 
+* Options
+  - Only a single option byte exists
+