optimize delays for better accuracy

This commit is contained in:
Jeff Wang 2019-03-21 21:03:35 -04:00
parent 33949440db
commit 606ac5c2f8
3 changed files with 57 additions and 25 deletions

View File

@ -8,7 +8,7 @@
#include "key.h" #include "key.h"
#include "utils.h" #include "utils.h"
#define FOSC 11059200 #define FOSC 11583000
static const char KEY_MAP[20] = { static const char KEY_MAP[20] = {
@ -46,19 +46,34 @@ void timer0_isr() __interrupt 1 __using 1
INCR_NEW_KEY_I(new_key_write_i); INCR_NEW_KEY_I(new_key_write_i);
new_key_empty = 0; new_key_empty = 0;
} }
//track time
count++;
if (count == 200){
count = 0;
SecCount++;
if (SecCount == 60){
SecCount = 0;
min_count++;
if (min_count == 60){
min_count = 0;
hour_count++;
}
}
}
} }
// Call timer0_isr() 10000/sec: 0.0001 sec // Call timer0_isr() 200/sec: 5 ms period
// Initialize the timer count so that it overflows after 0.0001 sec // Initialize the timer count so that it overflows after 0.01 sec
// THTL = 0x10000 - FOSC / 12 / 10000 = 0x10000 - 92.16 = 65444 = 0xFFA4 // THTL = 0x10000 - FOSC / 200 = 0x10000 - 115830 = 7621 = 0x1DC5
void Timer0Init(void) //100us @ 11.0592MHz void Timer0Init(void)
{ {
// TMOD = 0; // default: 16-bit auto-reload // TMOD = 0; // default: 16-bit auto-reload
// AUXR = 0; // default: traditional 8051 timer frequency of FOSC / 12 AUXR |= 0x80; // use undivided SYSclk for timer0
// Initial values of TL0 and TH0 are stored in hidden reload registers: RL_TL0 and RL_TH0 // Initial values of TL0 and TH0 are stored in hidden reload registers: RL_TL0 and RL_TH0
TL0 = 0xA4; // Initial timer value TL0 = 0xC5; // Initial timer value
TH0 = 0xFF; // Initial timer value TH0 = 0x1D; // Initial timer value
TF0 = 0; // Clear overflow flag TF0 = 0; // Clear overflow flag
TR0 = 1; // Timer0 start run TR0 = 1; // Timer0 start run
ET0 = 1; // Enable timer0 interrupt ET0 = 1; // Enable timer0 interrupt

View File

@ -2,20 +2,38 @@
void _delay_ms(uint8_t ms) void _delay_ms(uint8_t ms)
{ {
// delay function, tuned for 11.092 MHz clock // delay function, tuned for 11.583 MHz clock
// optimized to assembler // optimized to assembler
ms; // keep compiler from complaining? ms; // keep compiler from complaining
__asm; __asm;
; dpl contains ms param value ; dpl contains ms param value
delay$: ms_delay$:
mov b, #8 ; i mov b, #10 ; i, 2 clocks
outer$: ms_outer$:
mov a, #243 ; j mov a, #230 ; j, 2 clocks
inner$: ms_inner$:
djnz acc, inner$ djnz acc, ms_inner$ ;4 clocks
djnz b, outer$ djnz b, ms_outer$ ;4 clocks
djnz dpl, delay$ djnz dpl, ms_delay$ ;4 clocks
__endasm; __endasm;
}
void _delay_us(uint8_t us)
{
// delay function, tuned for 11.583 MHz clock
// optimized to assembler
us; // keep compiler from complaining
__asm;
; dpl contains us param value
us_delay$:
nop
nop
nop
nop
nop
nop
djnz dpl, us_delay$
__endasm;
} }
char* u32str(uint32_t x, char* buf, uint8_t base) char* u32str(uint32_t x, char* buf, uint8_t base)

View File

@ -11,8 +11,7 @@
void _delay_ms(uint8_t ms); void _delay_ms(uint8_t ms);
//TODO void _delay_us(uint8_t us);
#define _delay_us(x) _delay_ms(1)
char* u32str(uint32_t x, char* buf, uint8_t base); char* u32str(uint32_t x, char* buf, uint8_t base);