From ad80ab8502438060c2621b7fb239f0655efc477e Mon Sep 17 00:00:00 2001 From: 7u83 <7u83@mail.ru> Date: Fri, 3 May 2024 23:11:40 +0200 Subject: [PATCH] Hello, world! --- Makefile | 59 ++++++++++++++++++ adc.c | 50 +++++++++++++++ adc.h | 47 ++++++++++++++ main.c | 57 +++++++++++++++++ mctools.h | 18 ++++++ stc15.h | 179 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 410 insertions(+) create mode 100644 Makefile create mode 100644 adc.c create mode 100644 adc.h create mode 100644 main.c create mode 100644 mctools.h create mode 100644 stc15.h diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..485d678 --- /dev/null +++ b/Makefile @@ -0,0 +1,59 @@ +SDCC ?= sdcc +SDAR ?= sdar +STCCODESIZE ?= 4089 +SDCCOPTS ?= -mmcs51 --iram-size 512 --code-size $(STCCODESIZE) --xram-size 0 --disable-warning 126 --disable-warning 59 +SDCCREV ?= -Dstc15f204ea +STCGAL ?= stcgal +#/stcgal.py +STCGALOPTS ?= +STCGALPORT ?= /dev/ttyUSB0 +STCGALPROT ?= auto +FLASHFILE ?= main.ihx +SYSCLK ?= 12000 +CFLAGS ?= -DWITH_ALT_LED9 -DWITHOUT_LEDTABLE_RELOC -DSHOW_TEMP_DATE_WEEKDAY + +LIBSRC = ports.c adc.c + + +LIBOBJ =$(patsubst %.c,%.rel, $(LIBSRC)) +LIBNAME=mctools.lib + +PRGSRC = main.c +PRGOBJ =$(patsubst %.c,%.rel, $(PRGSRC)) + + +$(FLASHFILE): $(LIBNAME) $(PRGOBJ) + $(SDCC) -o $(FLASHFILE) $(SDCCOPTS) $(SDCCREV) $(CFLAGS) $(PRGOBJ) $(LIBNAME) +#// @ tail -n 5 build/main.mem | head -n 2 +#// @ tail -n 1 build/main.mem +# cp build/$@.ihx $@.hex + + + +$(LIBNAME): $(LIBOBJ) + $(SDAR) -rc $(LIBNAME) $(LIBOBJ) +#all: +# make uart2.ihx + +%.rel: %.c + $(SDCC) $(SDCCOPTS) $(SDCCREV) -o $@ -c $< + +eeprom: + sed -ne '/:..1/ { s/1/0/2; p }' main.hex > eeprom.hex + +flash: $(FLASHFILE) + $(STCGAL) -p $(STCGALPORT) -P $(STCGALPROT) -t $(SYSCLK) $(STCGALOPTS) $(FLASHFILE) + +clean: + rm -f *.ihx *.hex *.bin *.rst + rm -f *.map + rm -f *.rel + rm -f *.lst + rm -f *.sym + rm -f *.asm + rm -f *.lk + rm -f *.mem + rm -f *.lib + +cpp: SDCCOPTS+=-E +cpp: main diff --git a/adc.c b/adc.c new file mode 100644 index 0000000..c6ad9b4 --- /dev/null +++ b/adc.c @@ -0,0 +1,50 @@ + /*---------------------------------------------------------------------------------*/ +/* --- STC MCU International Limited ------------------------------------- +*/ +/* --- STC 15 Series MCU A/D Conversion Demo ----------------------- +*/ +/* --- Mobile: (86)13922805190 -------------------------------------------- +*/ +/* --- Fax: 86-755-82944243 -------------------------------------------------*/ +/* --- Tel: 86-755-82948412 ------------------------------------------------- +*/ +/* --- Web: www.STCMCU.com -------------------------------------------- +*/ +/* If you want to use the program or the program referenced in the ---*/ +/* article, please specify in which data and procedures from STC --- +*/ +/*----------------------------------------------------------------------------------*/ +#include "stc15.h" +#include "adc.h" + +/*---------------------------- +Initial ADC sfr +----------------------------*/ +void InitADC(uint8_t chan) +{ + P1ASF |= 1 << chan; //enable channel ADC function + ADC_RES = 0; //Clear previous result + ADC_CONTR = ADC_POWER | ADC_SPEEDLL; + //Delay(2); //ADC power-on and delay +} + +/*---------------------------- +Get ADC result - 10 bit +----------------------------*/ +uint16_t getADCResult(uint8_t chan) +{ + uint8_t upper8; + upper8 = getADCResult8(chan); + return upper8 << 2 | (ADC_RESL & 0b11) ; //Return ADC result, 10 bits +} + +uint8_t getADCResult8(uint8_t chan) +{ + ADC_CONTR = ADC_POWER | ADC_SPEEDHH | ADC_START | chan; + _nop_; //Must wait before inquiry + while (!(ADC_CONTR & ADC_FLAG)); //Wait complete flag + ADC_CONTR &= ~ADC_FLAG; //Close ADC + return ADC_RES; //Return ADC result, 8 bits +} + + diff --git a/adc.h b/adc.h new file mode 100644 index 0000000..9299540 --- /dev/null +++ b/adc.h @@ -0,0 +1,47 @@ + /*---------------------------------------------------------------------------------*/ +/* --- STC MCU International Limited ------------------------------------- +*/ +/* --- STC 15 Series MCU A/D Conversion Demo ----------------------- +*/ +/* --- Mobile: (86)13922805190 -------------------------------------------- +*/ +/* --- Fax: 86-755-82944243 -------------------------------------------------*/ +/* --- Tel: 86-755-82948412 ------------------------------------------------- +*/ +/* --- Web: www.STCMCU.com -------------------------------------------- +*/ +/* If you want to use the program or the program referenced in the ---*/ +/* article, please specify in which data and procedures from STC --- +*/ +/*----------------------------------------------------------------------------------*/ +#include "stc15.h" +#include + +#define _nop_ __asm nop __endasm; + +/*Define ADC operation const for ADC_CONTR*/ +#define ADC_POWER 0x80 //ADC power control bit +#define ADC_FLAG 0x10 //ADC complete flag +#define ADC_START 0x08 //ADC start control bit +#define ADC_SPEEDLL 0x00 //540 clocks +#define ADC_SPEEDL 0x20 //360 clocks +#define ADC_SPEEDH 0x40 //180 clocks +#define ADC_SPEEDHH 0x60 //90 clocks + +/*---------------------------- +Initialize ADC sfr +----------------------------*/ +void InitADC(uint8_t chan); + +/*---------------------------- +Get ADC result - 10 bits +----------------------------*/ +uint16_t getADCResult(uint8_t chan); + +/*---------------------------- +Get ADC result - 8 bits +----------------------------*/ +uint8_t getADCResult8(uint8_t chan); + + + diff --git a/main.c b/main.c new file mode 100644 index 0000000..312e725 --- /dev/null +++ b/main.c @@ -0,0 +1,57 @@ + +#include "mctools.h" + +#define FOSC 12000000L //system frequency +#define BAUD 9600L //baud-rate + + +#define DLED P2_6 +#define ILED P2_7 +#define T0_1MS (65536-FOSC/12/1000) + + +static void timer0_isr() __interrupt(1) +{ + static int count=1; + if (count--) + return; + count = 1; + ILED = !ILED; + return; +} + +void timer0_init() { + + stc15_timer0_set_sysclk12(); + stc15_timer0_set_mode_16bitauto(); + + + TL0 = T0_1MS; // Initial timer value + TH0 = T0_1MS>>8; // Initial timer value + TF0 = 0; // Clear overflow flag + TR0 = 1; // Timer0 start run + ET0 = 1; // Enable timer0 interrupt + + + +/* AUXR &=0x7F; // T0 in 12T mode + TMOD = 0x00; // T0 16-bit-auto-reload + + TL0 = T0_1MS; // Initial timer value + TH0 = T0_1MS>>8; // Initial timer value + // + TF0 = 0; // Clear overflow flag + TR0 = 1; // Timer0 start run + ET0 = 1; // Enable timer0 interrupt +*/ + +} + +void main() +{ + ILED=0; + timer0_init(); + EA=1; + while(1); +} + diff --git a/mctools.h b/mctools.h new file mode 100644 index 0000000..990821a --- /dev/null +++ b/mctools.h @@ -0,0 +1,18 @@ +#ifndef MCTOOLS_H_ +#define MCTOOLS_H_ + +#include "stc15.h" + + +#define stc15_timer0_set_mode_16bitauto() TMOD &= 0xFC; +#define stc15_timer0_set_mode_1() TMOD &= 0xFC; TMOD|=0x01; +#define stc15_timer0_set_mode_8bitauto() TMOD &= 0xFC; TMOD|=0x02; +#define stc15_timer0_set_mode_stop() TMOD|=0x03; +#define stc15_timer0_set_sysclk12() AUXR &= 0x7F; +#define stc15_timer0_set_sysclk1() AUXR |= 0x80; + +#define stc15_timer2_set_sysclk12() AUXR &= 0xFB; +#define stc15_timer2_set_sysclk1() AUXR |= 0x04; +#define stc15_timer2_set_clk_internal() AUXR &=0xF7; // T2 use internal clck + +#endif diff --git a/stc15.h b/stc15.h new file mode 100644 index 0000000..5320630 --- /dev/null +++ b/stc15.h @@ -0,0 +1,179 @@ +#ifndef _STC15_H_ +#define _STC15_H_ + +#include <8051.h> + +#ifdef REG8051_H +#undef REG8051_H +#endif + +/* P4 */ +__sfr __at (0xC0) P4 ; +__sbit __at (0xC0) P4_0 ; +__sbit __at (0xC1) P4_1 ; +__sbit __at (0xC2) P4_2 ; +__sbit __at (0xC3) P4_3 ; +__sbit __at (0xC4) P4_4 ; +__sbit __at (0xC5) P4_5 ; +__sbit __at (0xC6) P4_6 ; +__sbit __at (0xC7) P4_7 ; + +__sfr __at 0x94 P0M0; +__sfr __at 0x93 P0M1; +__sfr __at 0x92 P1M0; +__sfr __at 0x91 P1M1; +__sfr __at 0x96 P2M0; +__sfr __at 0x95 P2M1; +__sfr __at 0xB2 P3M0; +__sfr __at 0xB1 P3M1; +__sfr __at 0xB4 P4M0; +__sfr __at 0xB3 P4M1; +__sfr __at 0xCA P5M0; +__sfr __at 0xC9 P5M1; +__sfr __at 0xCC P6M0; +__sfr __at 0xCB P6M1; +__sfr __at 0xE2 P7M0; +__sfr __at 0xE1 P7M1; + +__sfr __at 0x8E AUXR; +__sfr __at 0xA2 AUXR1; +__sfr __at 0xA2 P_SW1; +__sfr __at 0x97 CLK_DIV; +__sfr __at 0xA1 BUS_SPEED; +__sfr __at 0x9D P1ASF; +__sfr __at 0xBA P_SW2; + +/* IE */ +__sbit __at 0xAE ELVD; +__sbit __at 0xAD EADC; + +/* IP */ +__sbit __at 0xBF PPCA; +__sbit __at 0xBE PLVD; +__sbit __at 0xBD PADC; + +__sfr __at 0xAF IE2; +__sfr __at 0xB5 IP2; +__sfr __at 0x8F INT_CLKO; + +__sfr __at 0xD1 T4T3M; +__sfr __at 0xD1 T3T4M; +__sfr __at 0xD2 T4H; +__sfr __at 0xD3 T4L; +__sfr __at 0xD4 T3H; +__sfr __at 0xD5 T3L; +__sfr __at 0xD6 T2H; +__sfr __at 0xD7 T2L; +__sfr __at 0xAA WKTCL; +__sfr __at 0xAB WKTCH; +__sfr __at 0xC1 WDT_CONTR; + +__sfr __at 0x9A S2CON; +__sfr __at 0x9B S2BUF; +__sfr __at 0xAC S3CON; +__sfr __at 0xAD S3BUF; +__sfr __at 0x84 S4CON; +__sfr __at 0x85 S4BUF; +__sfr __at 0xA9 SADDR; +__sfr __at 0xB9 SADEN; + +//ADC +__sfr __at 0xBC ADC_CONTR; +__sfr __at 0xBD ADC_RES; +__sfr __at 0xBE ADC_RESL; + +//SPI +__sfr __at 0xCD SPSTAT; +__sfr __at 0xCE SPCTL; +__sfr __at 0xCF SPDAT; + +//IAP/ISP +__sfr __at 0xC2 IAP_DATA; +__sfr __at 0xC3 IAP_ADDRH; +__sfr __at 0xC4 IAP_ADDRL; +__sfr __at 0xC5 IAP_CMD; +__sfr __at 0xC6 IAP_TRIG; +__sfr __at 0xC7 IAP_CONTR; + +//PCA/PWM +__sfr __at 0xD8 CCON; +__sbit __at 0xDF CF; +__sbit __at 0xDE CR; +__sbit __at 0xDA CCF2; +__sbit __at 0xD9 CCF1; +__sbit __at 0xD8 CCF0; + +__sfr __at 0xD9 CMOD; +__sfr __at 0xE9 CL; +__sfr __at 0xF9 CH; +__sfr __at 0xDA CCAPM0; +__sfr __at 0xDB CCAPM1; +__sfr __at 0xDC CCAPM2; +__sfr __at 0xEA CCAP0L; +__sfr __at 0xEB CCAP1L; +__sfr __at 0xEC CCAP2L; +__sfr __at 0xF2 PCA_PWM0; +__sfr __at 0xF3 PCA_PWM1; +__sfr __at 0xF4 PCA_PWM2; +__sfr __at 0xFA CCAP0H; +__sfr __at 0xFB CCAP1H; +__sfr __at 0xFC CCAP2H; + +__sfr __at 0xE6 CMPCR1; +__sfr __at 0xE7 CMPCR2; + +//PWM +__sfr __at 0xf1 PWMCFG; +__sfr __at 0xf5 PWMCR; +__sfr __at 0xf6 PWMIF; +__sfr __at 0xf7 PWMFDCR; + +#define PWMC (*(unsigned int volatile xdata *)0xfff0) +#define PWMCH (*(unsigned char volatile xdata *)0xfff0) +#define PWMCL (*(unsigned char volatile xdata *)0xfff1) +#define PWMCKS (*(unsigned char volatile xdata *)0xfff2) +#define PWM2T1 (*(unsigned int volatile xdata *)0xff00) +#define PWM2T1H (*(unsigned char volatile xdata *)0xff00) +#define PWM2T1L (*(unsigned char volatile xdata *)0xff01) +#define PWM2T2 (*(unsigned int volatile xdata *)0xff02) +#define PWM2T2H (*(unsigned char volatile xdata *)0xff02) +#define PWM2T2L (*(unsigned char volatile xdata *)0xff03) +#define PWM2CR (*(unsigned char volatile xdata *)0xff04) +#define PWM3T1 (*(unsigned int volatile xdata *)0xff10) +#define PWM3T1H (*(unsigned char volatile xdata *)0xff10) +#define PWM3T1L (*(unsigned char volatile xdata *)0xff11) +#define PWM3T2 (*(unsigned int volatile xdata *)0xff12) +#define PWM3T2H (*(unsigned char volatile xdata *)0xff12) +#define PWM3T2L (*(unsigned char volatile xdata *)0xff13) +#define PWM3CR (*(unsigned char volatile xdata *)0xff14) +#define PWM4T1 (*(unsigned int volatile xdata *)0xff20) +#define PWM4T1H (*(unsigned char volatile xdata *)0xff20) +#define PWM4T1L (*(unsigned char volatile xdata *)0xff21) +#define PWM4T2 (*(unsigned int volatile xdata *)0xff22) +#define PWM4T2H (*(unsigned char volatile xdata *)0xff22) +#define PWM4T2L (*(unsigned char volatile xdata *)0xff23) +#define PWM4CR (*(unsigned char volatile xdata *)0xff24) +#define PWM5T1 (*(unsigned int volatile xdata *)0xff30) +#define PWM5T1H (*(unsigned char volatile xdata *)0xff30) +#define PWM5T1L (*(unsigned char volatile xdata *)0xff31) +#define PWM5T2 (*(unsigned int volatile xdata *)0xff32) +#define PWM5T2H (*(unsigned char volatile xdata *)0xff32) +#define PWM5T2L (*(unsigned char volatile xdata *)0xff33) +#define PWM5CR (*(unsigned char volatile xdata *)0xff34) +#define PWM6T1 (*(unsigned int volatile xdata *)0xff40) +#define PWM6T1H (*(unsigned char volatile xdata *)0xff40) +#define PWM6T1L (*(unsigned char volatile xdata *)0xff41) +#define PWM6T2 (*(unsigned int volatile xdata *)0xff42) +#define PWM6T2H (*(unsigned char volatile xdata *)0xff42) +#define PWM6T2L (*(unsigned char volatile xdata *)0xff43) +#define PWM6CR (*(unsigned char volatile xdata *)0xff44) +#define PWM7T1 (*(unsigned int volatile xdata *)0xff50) +#define PWM7T1H (*(unsigned char volatile xdata *)0xff50) +#define PWM7T1L (*(unsigned char volatile xdata *)0xff51) +#define PWM7T2 (*(unsigned int volatile xdata *)0xff52) +#define PWM7T2H (*(unsigned char volatile xdata *)0xff52) +#define PWM7T2L (*(unsigned char volatile xdata *)0xff53) +#define PWM7CR (*(unsigned char volatile xdata *)0xff54) + +#endif +